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MC14500 1 bit CPU (ICU)

The MC14500 is an Industrial Control Unit (ICU) that is also considered being a 1 bit processor. It was produced by Motorola, but the production has been stopped years ago. Today the MC14500 fits well into affordable FPGA's including all its peripherals and program memory. Different reasons exist to still today to use a MC14500 design:

• Creating spare parts to for old MC14500 machines
• Reuse of MC14500 software
• Separation between FPGA development (VHDL code => electronic specialist) and application (application engineer)
• Low cost PLC alternative
• Fun to run historic stuff on modern FPGA's
• Learning project using FPGA's, Altera Quartus II Software and VHDL

The assembler and disassembler have been written to run on modern PC's and different operating systems, this is why python got used as programming language. See www.python.org . Be aware that python version 2 and 3 are not compatible. The programs were written for Python version 2. The output of the assembler produces currently just the MIF format to be used for memory in Altera FPGA's. The disassembler can be use to read a Motorola-S files that can be produced by reading out a EPROM device using a programmer. The disassembler converts such files to MC14500 assembly code that will be understood by the mc14500 assembler. This way memory width and fileformat can also be converted.

Manual installation of the assembler and disassembler

The assembler and disassembler are just two python scripts,have two man pages and some sample programs. Download the latest version mc14500-*.*.tar.gz". See www.python.org to get some help how to install python on your computer.

Gentoo Linux installation of the assembler and disassembler

• Install my Overlay linursoverlay Since it is not an official ebuild you must unmask it. Type: echo "dev-embedded/mc14500 ~x86" >> /etc/portage/package.keywords
• Type emerge mc14500to install it
• Type emerge --unmerge mc14500to remove it

Other links to MC14500 related stuff

• A MC14500 wiki page
• VHDL code and datasheet of the MC14500
• German site of a learning computer using the MC14500
• The same thing in the museum
• Project rebuilding the MC14500 with conventional logic
• For our Japanese friends, including pictures of highly advanced MC14500 designs

Altera FPGA design of a MC14500 CPU board implementation using Quartus II

• Download the Quartus II Web edition from www.altera.com. Unfortunately just the Windows version is for free.
• Get the quartus II sample project

Features of this MC14500 CPU are:

• Cyclone FPGA EP3C5E144C8 in the rather small QFP 144 case
• 16 inputs plus 16 outputs that can be read back
• 16 bit wide ROM (2kByte) containing the program
• High speed
• All important signals available on the pins
• Embarrassing how little of the chips internal logic is used, leaving space for much more
• 1 bit wide RAM to store temporary data
• All CPU signals are fed to pins of the FPGA

A simulation with a sample program

And now some real hardware

The same sample program running in the real hardware and analyzed with the embedded logic analyzer